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RTL Design Engineer

Company: Tachyum
Location: Palo Alto
Posted on: February 18, 2021

Job Description:

RTL Design Engineer




Working on PCIe, DRAM and high speed bus interfaces for an SOC.







Required:





Logic design experience

Strong understanding of processor and computer architecture
Verilog or System Verilog
PCIe, DRAM and other high speed interfaces
Synthesis / STA (Stating timing analysis) / CDC / LINT





Desired:


Knowledge of programming languages C, scripting (Perl / shell / python / awk) is a plus


Yoh, a Day & Zimmermann company, is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran. Visit https://www.yoh.com/applicants-with-disabilities to contact us if you are an individual with a disability and require accommodation in the application process.PandoLogic.Category: General

Keywords: Tachyum, Palo Alto , RTL Design Engineer, Engineering , Palo Alto, California

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